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vandit
16-08-15, 07:24 PM
Aldec Active-HDL 10.1 (64bit) (16/8/2015)


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Aldec Active-HDL 10.1 (64bit) | 478.7 mb


Aldec, Inc., announces the latest release of its mixed-language FPGA design platform, Active-HDL 10.1. Popular with designers for more than 15 years for FPGA design entry and simulation due to its award-winning and intuitive GUI and high performance simulator, Active-HDL now offers support for 64-bit simulation to meet the growing demand of simulation of larger designs.

Active-HDL is an HDL-based FPGA Design and Simulation solution that supports the newest FPGA devices available from all leading FPGA vendors. The high-performance, mixed-language solution interfaces with nearly one hundred twenty (120) third party vendor tools and provides FPGA designers a single platform that can be used independently of the targeted FPGA design flow. Active-HDL 10.1 supports design creation and simulation of the newest industry-leading FPGA devices from Altera, Lattice, Microsemi (Actel), Quicklogic and Xilinx.

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